| Preface | 5 |
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| Contents | 8 |
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| Contributors | 12 |
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| Non-Silicon MOSFET Technology: A Long Time Coming | 15 |
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| Abstract | 15 |
| 1.1 Introduction | 15 |
| 1.2 Brief and Non-Comprehensive History of the NSMOSFET | 16 |
| 1.3 Surface Fermi Level Pinning: The Bane of NSMOSFET Technology Development | 17 |
| 1.4 Concluding Remarks | 20 |
| References | 20 |
| Properties and Trade-Offs of Compound Semiconductor MOSFETs | 21 |
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| 2.1 Introduction | 21 |
| 2.2 Simulation Framework | 24 |
| 2.2.1 Bandstructure Calculation (Real and Complex) | 24 |
| 2.2.2 Band-to-Band Tunneling (Off-State Leakage) | 25 |
| 2.2.3 Quantum Ballistic Current (On-State Drive Current) | 27 |
| 2.3 Power-Performance Tradeoffs in Binary III-V Materials (GaAs, InAs, InP and InSb) vs. Si and Ge | 29 |
| 2.3.1 Inversion Charge and Injection Velocity | 29 |
| 2.3.2 ION., IOFF, BTBT and Delay | 30 |
| 2.3.3 Effect of Scaling Film Thickness and VDD | 31 |
| 2.3.4 Power-Performance Tradeoff of Binary III-V Materials vs. Si and Ge | 32 |
| 2.4 Power-Performance of Strained Ternary III-V Material (InxGa1-xAs) | 33 |
| 2.4.1 Strained InGaAs Band Structures | 33 |
| 2.4.2 ION and IOFF,BTBT with Strain Engineering and Channel Orientation | 34 |
| 2.4.3 Power-Performance of Strained Ternary III-V Material (InGaAs) | 35 |
| 2.5 Strained III-V for p-MOSFETs | 36 |
| 2.5.1 Hole Mobility in Ternary III-V Materials (InGaAs vs. InGaSb) | 36 |
| 2.5.2 Hole Mobility Enhancement in III-Vs with Strain | 37 |
| 2.6 Novel Device Structure and Parasitics | 38 |
| 2.6.1 Quantum Well (QW) Strained Heterostructure III-V FETs | 38 |
| 2.6.2 Parasitic Resistance | 39 |
| 2.6.3 Parasitic Capacitance | 40 |
| 2.7 Conclusion | 41 |
| Device Physics and Performance Potential of III-V Field-Effect Transistors | 45 |
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| 3.1 Introduction | 45 |
| 3.2 InGaAs HEMTs | 46 |
| 3.2.1 Device Structure | 46 |
| 3.2.2 Simulation Approach | 48 |
| 3.2.3 Materials Parameters | 48 |
| 3.2.4 Results | 49 |
| 3.3 Discussion | 50 |
| 3.3.1 Gate Capacitance | 50 |
| 3.3.2 Charge Control in a Nanoscale HEMT | 52 |
| 3.3.3 Velocity at the Virtual Source | 53 |
| 3.3.4 Ballistic Mobility | 54 |
| 3.3.5 Source Design Issues | 55 |
| 3.3.6 Role of S/D Tunneling | 56 |
| 3.3.7 Back of the Envelope Calculations | 58 |
| 3.4 Conclusions | 60 |
| Theory of HfO2-Based High-k Dielectric Gate Stacks | 64 |
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| 4.1 Introduction | 64 |
| 4.2 Theoretical Background | 65 |
| 4.2.1 Density Functional Theory | 65 |
| 4.2.2 Modeling Interfaces and Surfaces | 68 |
| 4.3 Properties of Bulk Hafnia and Zirconia | 70 |
| 4.4 Surfaces | 84 |
| 4.4.1 Monoclinic Hafnia | 85 |
| 4.4.2 Tetragonal Hafnia | 91 |
| 4.4.3 Role of Surface Energy in the M–T Transformation | 93 |
| 4.5 Band Alignment at Hafnia Interfaces | 94 |
| 4.5.1 SiO2.../.HfO2 Interface | 95 |
| 4.5.2 Effects of Al Doping at the SiO2./HfO2 Interface | 97 |
| 4.5.3 Thermal Stability and Fermi Level Pinning at the HfO2./Metal Interface | 99 |
| 4.6 Conclusions | 102 |
| Density Functional Theory Simulations of High-k Oxides on III-V Semiconductors | 105 |
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| 5.1 Introduction | 105 |
| 5.1.1 High-k Oxides | 105 |
| 5.1.2 III-V Semiconductors | 106 |
| 5.1.3 Density-Functional Theory | 107 |
| 5.2 Methodology of DFT Simulations of High-k Oxides on Semiconductor Substrates | 108 |
| 5.2.1 Oxide Deposition Technique in DFT Simulations | 108 |
| 5.2.2 Oxide-Semiconductor Stack Design | 110 |
| 5.2.3 Crystalline vs. Amorphous Oxides in DFT Simulations | 113 |
| 5.2.4 The Oxide-Semiconductor Stack Simulation Techniques: DFT Relaxation vs. Molecular Dynamics | 115 |
| 5.3 DFT Simulations of High-k Oxides on Si/Ge Substrates | 118 |
| 5.4 Generation of Amorphous High-k Oxide Samples by Hybrid Classical-DFT Molecular Dynamics Computer Simulations | 124 |
| 5.5 The Current Progress in DFT Simulations of High-k Oxide/III-V Semiconductor Stacks |
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